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how to see pci header information ?

Discussion about the QNX6 OS.

how to see pci header information ?

Postby Jagat » Tue Jan 25, 2011 12:54 pm

Hi,

Can any one tell me how to see the pci header information in qnx 6.5 ?

I have tried using pci -vvv but it is not showing the memory range allocated for the devices . Also i amd not able to see the device information based on the bus number.

is there any other command except pci -vv|-n to see the pci device details ?
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RE: how to see pci header information ?

Postby maschoen » Tue Jan 25, 2011 3:29 pm

There is an API to read pci information.
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Postby ingraham » Tue Jan 25, 2011 11:24 pm

Of course, pci USES the API, so I imagine you won't get any better results from direct calls. Can you attach the output of pci -vvv? And can you tell us a manufacturer and part number for the card?

-James Ingraham
Sage Automation, Inc.
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Postby mario » Wed Jan 26, 2011 2:32 am

From memory pci -vvv does show memory range .
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Postby Jagat » Thu Jan 27, 2011 1:50 pm

I have attached the pci-vvv output for your refernce.

I want to know the base address of the Tundra (TSI148) VME chip. As it is coming as other I have also tried with pci-bios -B but i am unable to find out the base address of this chip.

But if I am reading throguh pci calls (pci_attach_device and cpuBaseAddress) it is coming correctly.

PCI version = 3.00

Class = Bridge (PCI/PCI)
Vendor ID = 12d8h, Pericom Semiconductor
Device ID = e130h, PCI Express to PCI-XPI7C9X130 PCI-X Bridge
PCI index = 0h
Class Codes = 060400h
Revision ID = 4h
Bus number = 1
Device number = 0
Function num = 0
Status Reg = 10h
Command Reg = 147h
I/O space access enabled
Memory space access enabled
Bus Master enabled
Special Cycle operations ignored
Memory Write and Invalidate disabled
Palette Snooping disabled
Parity Error Response enabled
Data/Address stepping disabled
SERR# driver enabled
Fast back-to-back transactions to different agents disabled
PCI INTx enabled
Header type = 1h Single-function
BIST = 0h Build-in-self-test not supported
Latency Timer = 0h
Cache Line Size= 10h un-cacheable
Primary Bus Number = 1
Secondary Bus Number = 2
Subordinate Bus Number = 2
Secondary Latency Timer = 20h
I/O Base = f1h
I/O Limit = 1h
Secondary Status = 2220h
Memory Base = fe60h
Memory Limit = fe60h
Prefetchable Memory Base = fff1h
Prefetchable Memory Limit= 1h
Prefetchable Base Upper 32 Bits = 0h
Prefetchable Limit Upper 32 Bits = 0h
I/O Base Upper 16 Bits = ffh
I/O Limit Upper 16 Bits = 0h
Bridge Control = 13h
PCI Int Pin = INT A
Interrupt line = 11
CPU Interrupt = bh
Capabilities Pointer = 80h
Capability ID = 7h - PCI-X
Capabilities = 83h - 100h
Capability ID = 1h - Power Management
Capabilities = c843h - 0h
Capability ID = dh - PCI Bridge Subsystem Vendor ID
Capabilities = 0h - 0h
Capability ID = 10h - PCI Express
Capabilities = 71h - 8022h
Capability ID = 5h - Message Signaled Interrupts
Capabilities = 80h - 0h
Device Dependent Registers:
0x040: 2000 2009 0000 0000 ff81 4000 0000 0000
0x050: 0000 0000 0000 0000 0000 0000 0000 0000
0x060: 0000 0000 0000 0000 0008 00b8 0000 0000
0x070: 8800 0000 0000 0000 0000 00f0 0000 0000
0x080: 0790 8300 0001 0000 1000 1000 1000 1000
0x090: 01a8 43c8 0000 0000 0000 0000 0000 0000
0x0a0: 04b0 0000 0000 0000 0db0 0000 0000 0000
0x0b0: 10f0 7100 2280 0000 0000 1b00 413c 0000
0x0c0: 4000 1130 0000 0000 0000 0001 6010 0004
0x0d0: 7102 0004 5402 1900 03f0 0080 00ff 0000
0x0e0: 0000 0000 0000 0000 0000 0000 0000 0000
0x0f0: 0500 8000 0000 0000 0000 0000 0000 0000

Class = Bridge (Other)
Vendor ID = 10e3h, Tundra Semiconductor Corp.
Device ID = 148h, Tsi148 [Tempe]
PCI index = 0h
Class Codes = 068000h
Revision ID = 1h
Bus number = 2
Device number = 0
Function num = 0
Status Reg = 230h
Command Reg = 140h
I/O space access disabled
Memory space access disabled
Bus Master disabled
Special Cycle operations ignored
Memory Write and Invalidate disabled
Palette Snooping disabled
Parity Error Response enabled
Data/Address stepping disabled
SERR# driver enabled
Fast back-to-back transactions to different agents disabled
PCI INTx enabled
Header type = 0h Single-function
BIST = 0h Build-in-self-test not supported
Latency Timer = 20h
Cache Line Size= 0h
BAR - 0 [Mem] = 0h 64bit length 4096 disabled
Max Lat = 0ns
Min Gnt = 0ns
PCI Int Pin = INT A
Interrupt line = 11
CPU Interrupt = bh
Capabilities Pointer = 40h
Capability ID = 7h - PCI-X
Capabilities = 20h - 5730200h
Device Dependent Registers:
0x040: 0700 2000 0002 7305 0000 0000 0000 0000
0x050: 0000 0000 0000 0000 0000 0000 0000 0000
...
0x0f0: 0000 0000 0000 0000 0000 0000 0000 0000
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Postby mario » Thu Jan 27, 2011 4:51 pm

That is because your device is not enabled and thus it was not assigned any addresses:

BAR - 0 [Mem] = 0h 64bit length 4096 *disabled*

On an enabled device you'd get something like :
BAR - 0 [Mem] = f9000000h 32bit length 1024 enabled
BAR - 0 [I/O] = 1f0h length 8 enabled

As to why your device is disabled I don't know.
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