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Time Stamp Counter on SMP system

Discussion about the QNX6 OS.

Time Stamp Counter on SMP system

Postby jinma » Wed Jul 06, 2011 5:42 pm

what is the best of replacing ClockCycles() so that I can still get a fairly high resolution timer on a x86 SMP system? I don't want to "lock" the thread to a single CPU just to use ClockCycles(). I need a 1/4 of msec resolution for my timer. Thanks
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RE: Time Stamp Counter on SMP system

Postby mario » Wed Jul 06, 2011 9:25 pm

If you have control over the processor you are using , check the spec, some guaranty the counter increments the same on every core.

You could use the RTC counter (clock) I think it can be program to generate interrupt at various rate, plenty of code on the web.

Or use ClockPeriod to change the tick from 1ms to .250ms.
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RE: Time Stamp Counter on SMP system

Postby jinma » Fri Jul 08, 2011 8:23 pm

do you think it would be a big penalty on the kernel if I change the tick from 1ms to 0.1ms? how do I know or detect an optimal tick resolution for my HW/system?
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RE: Time Stamp Counter on SMP system

Postby mario » Mon Jul 11, 2011 1:24 pm

It's all about overhead,if you go from 1ms to .1ms that means there will be 10000 interrupts per seconds instead of 1000. Depending on your processor that can be a lot.

If you have performance requirement for your system, then just check if by doing that you can still mean them. It's as simple as that...
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RE: Time Stamp Counter on SMP system

Postby Thunderblade » Tue Jul 12, 2011 2:10 pm

Usually there are other timers available in hardware that you just have to program. Check your hardware documentation or talk to the hardware vendor. Much better than creating extra overhead by decreasing the tick size.
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RE: Time Stamp Counter on SMP system

Postby jinma » Tue Jul 12, 2011 4:14 pm

got it, thanks the all your input.
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