I would think that a 1GB per card would be OK in theory, I might get
concerned around 2GB (don't know why exactly
. Remember that each
process get's it's own 4GB address space currently (at least on x86) so
the total memory mapped by your processes (including stack, heap, shared
memory, and the memory mapped board) definately *can not* exceed 4GB.
This is an interesting question, I hope someone from QSSL answers in a
more authoritative fashion. In theory you should be able to map (4GB -
memory used by process) but there may be some implementation
thingamajigs that prevent this.
From: Wayne Fisher [mailto:email@example.com
Posted At: Monday, April 16, 2001 8:21 AM
Posted To: os
Conversation: Maximum addressing range: PCI
Subject: Re: Maximum addressing range: PCI
It doesn't look like this made it out last time... Here it is again.
"Wayne Fisher" <firstname.lastname@example.org
> wrote in message
We're in the design stages for some custom image processing boards and
hardware guys asked me what was the maximum amount of memory-mapped
they can configure the boards with and still be usable with
didn't know and didn't see anything in the docs or knowledge base on
For our system, we expect to have 4 to 8 similar PCI devices per
board computer (PowerPC based). Each device has some large memories on
for which it would be convenient if it could be mapped directly into a
process's address space.
What is the maximum amount of memory-mapped I/O that Neutrino can
Can we use a gigabyte or more, several hundred megabytes, or what? Any
limits on a per-device basis?
Thanks for any info or pointers to docs on this that you can provide.
Team Leader/Architect - Core Software
Focus Automation Systems Inc.